<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Memory on Aditya Kurniawan (Akur)</title><link>https://akurniawan.github.io/tags/memory/</link><description>Recent content in Memory on Aditya Kurniawan (Akur)</description><generator>Hugo</generator><language>en-us</language><lastBuildDate>Sun, 06 Sep 2026 00:00:00 +0700</lastBuildDate><atom:link href="https://akurniawan.github.io/tags/memory/index.xml" rel="self" type="application/rss+xml"/><item><title>NVLink-C2C Removes the Copy, Not the Synchronization</title><link>https://akurniawan.github.io/posts/nvlink-c2c-what-changes-for-cpp/</link><pubDate>Sun, 06 Sep 2026 00:00:00 +0700</pubDate><guid>https://akurniawan.github.io/posts/nvlink-c2c-what-changes-for-cpp/</guid><description>The CUDA Programming Guide assumes the host and the device keep separate memories with a copy between them. My DGX Spark doesn&amp;rsquo;t. So I went and learned what NVLink-C2C actually is compared to PCIe, how coherence behaves across it, and what that changes for someone writing C++ on this machine.</description></item></channel></rss>